Correct and Efficient Implementations of Synchronous Models on Asynchronous Execution Platforms∗

Concurrency is enjoying a second (or third? fourth?) youth. This is triggered by an anticipated revolution in the evolution of computer architecture, from faster, single-processor chips, to multi-processor chips with more and more processors [6]. This change brings hopes that the limits of Moore’s law will be overcome, but also fears that programming will become even harder than it already is. Indeed, parallel computing has been one of the holy grails of computer science. Concurrent programming today is predominantly thread-based. Thread-based concurrency is fundamentally asynchronous, in the sense that most thread-based models have an interleaving semantics, which stems from making few or no assumptions on the relative speeds of the threads. Thread communication is often based on some type of shared-memory model. This type of asynchronous concurrency results in nondeterministic behavior, which is hard to understand and debug. Indeed, a number of researchers claim that thread-based parallel programming is a bad idea [12, 9]. Other concurrency models, such as Kahn Process Networks [7], ensure deterministic results despite process interleaving. Unfortunately, most multi-processor architectures today do not follow such models, and use threads instead. Synchronous concurrency is based on a model that avoids interleaving. Instead, all processes execute in lock-step. Many theoretical models but also widely-used practical systems exist that follow the synchronous paradigm. For instance, Milner’s SCCS [11], the synchronous languages [2], languages such as VHDL and Verilog, which are very popular in the design and implementation of synchronous circuits, and tools such as Simulink and SCADE, which are widely used in the design and implementation of synchronous controllers. There is a long debate over the pros and cons of synchronous vs. asynchronous concurrency. One argument that often comes up in the debate in favor of synchrony is determinism. The semantics of most synchronous models are deterministic: given the same (sequence of inputs) the same (sequence of) outputs